Cadence Acquires Rambus' SerDes and Memory Interface PHY IP Business

Cadence has announced its acquisition of Rambus' SerDes and memory interface PHY IP business, while Rambus will retain its digital IP business, which includes memory and interface controllers and security IP. This strategic move allows Cadence to gain access to Rus' experienced and proven PHY engineering teams located in the US, India, and Canada.

integration of memory and Ser IP design and expertise is crucial for the development of, data center, hyperscale applications, CPU architectures, and networking devices. By incorporating Rambus' IP and skilled team, Cadence aims to accelerate its Intelligent System Design strategy, which emphasizes design excellence. The acquisition of Rambus' PHY IP expands Cadence's enterprise IP portfolio and enhances its presence in various geographies and vertical markets, including aerospace and defense, by providing comprehensive subsystem solutions.

The growing demand for memory and security driven by the momentum of AI and the continuous growth of data centers is a key factor behind this transaction. Rambus intends to focus market-leading digital IP and chips while expanding its roadmap of innovative memory solutions.

The transaction is expected to finalized in the third quarter and is projected to have no significant impact on the revenue and earnings of both companies for the current year.